Politecnico di Torino Porto Institutional Repository [ Proceeding ] Dependable Dynamic Partial Reconfiguration

نویسندگان

  • Giulio Gambardella
  • Marco Indaco
  • Paolo Prinetto
  • Daniele Rolfo
  • Pascal Trotta
چکیده

Thanks to their flexibility, FPGAs are nowadays widely used to implement digital systems’ prototypes and, more frequently, their final releases. Reconfiguration traditionally required an external controller to upload contents in the FPGA. Dynamic Partial Reconfiguration (DPR) opens new horizons in FPGAs’ applications, providing many new utilization paradigms, as it enables an FPGA to reconfigure itself: no external controller is required since it can be included in the FPGA. However, DPR also introduces reliability issues related to errors in the partial reconfiguration bitstreams. FPGA manufacturers currently provide solutions that are not efficient. In this paper new DfD (Design for Dependability) techniques are proposed. Exploiting information density of configuration data, they improve the performance while providing the same reliability characteristics as the previous ones.

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تاریخ انتشار 2016